1. Field of the Invention
Embodiments of the invention relate to the field of semiconductor device manufacturing. More particularly, the present invention relates to a method, system and structure for patterning a substrate and for implanting into a substrate for manufacturing a semiconductor device.
2. Discussion of Related Art
With continuing miniaturization of electronic devices, there is an increased need for a patterning process capable of achieving finer resolution. Scaling, the ability to print smaller and smaller features, enables the desired design attributes of smaller more complex chips per wafer. Unfortunately, limitations in lithography process equipment can no longer keep up with device scaling requirements. Two key areas stand out in fine feature imaging; the first is a negative attribute referred to as Line Edge or Width Roughness (LER or LWR respectively) and the second is the lack of ability to print tight geometry due to diffraction limits. During the etch step (pattern transfer), the LER roughness from the PR is transferred to the material being etched. LER results in device degradation usually in transistor or parametric stability during testing. Instead of a smooth well defined photoresist image, the patterning process results in a very rough line edge. Depending on the design, either short, medium or long range roughness will have more of an impact on device performance. Since photolithography alone does not produce smooth lines, subsequent steps need to be developed to eliminate or reduce the edge roughness of the lines. To address this problem, several additional processes have been tried yielding only marginal results. For example, dry chemical etch processes have the ability to remove material from the resist image but they suffer pattern dependent loading effects from different exposed areas isolated to dense biases.
In addition, the resist critical dimension (CD) is typically required to be within a tight tolerance, such that any secondary technique should maintain the original resist attributes for profile, height, and CD. Dry chemical etch systems could also impart unwanted defects to the pattern which could result in yield loss. Another alternative approach is the use of a Deep Ultraviolet (DUV) cure where the rough resist pattern is exposed to a lamp based platform to heat the resist through radiation exposure which can smooth the lines. The drawback to this technique is that, after exposure, the corner of the line segments exhibit pattern pull back, and resist lines may deform in such a way to render subsequently produced devices useless. Moreover none of the aforementioned approaches has been observed to reduce low frequency roughness, which may play a large role in degradation of devices, especially those having small CD such as, for example, CD below 100 nm. Accordingly, it will be appreciated that there is a need to improve resist patterning processes for technologies requiring very small feature sizes, such as sub-100 nm CD devices.